當(dāng) LUTRAM 讀寫(xiě)使用不同的時(shí)鐘，寫(xiě)時(shí)鐘 wclk_a，讀時(shí)鐘 rclk_b。

總結(jié)

When the read and write addresses are different, there is no CDC path between the write and the read clocks.

However, when the write and read addresses are the same, then there is a CDC path between the write clock and the read clock.

原因

當(dāng)讀寫(xiě)地址不同時(shí)，讀數(shù)據(jù)時(shí)數(shù)據(jù)不會(huì)發(fā)生寫(xiě)入，和寫(xiě)時(shí)鐘無(wú)關(guān)，讀出數(shù)據(jù)的delay是固定的，因此從 讀地址寄存器到 輸出寄存器 是一條同步路徑。

當(dāng)讀寫(xiě)地址相同時(shí)，讀數(shù)據(jù)時(shí)該地址同時(shí)正在被寫(xiě)入，讀出數(shù)據(jù)的delay的是依賴于寫(xiě)時(shí)鐘的，如果讀寫(xiě)時(shí)鐘靠的很近，輸出寄存器就可能出現(xiàn)亞穩(wěn)態(tài)。從 LUTRAM 到 輸出寄存器 是一條異步路徑。

Reference:

《Vivado Design Suite User Guide: Design Analysis and Closure Techniques》