資料介紹
This book is for engineers working on ASIC/SOC design and verification as well as
students or beginners who want to enhance their knowledge about how to actually
verify a chip. Beginners can get insight of what is expected. For verification experts it will be a guide to help improving their methodologies for efficient and effective functional verification processes. Topics covered in this chapter are:
Purpose of the book
General info on importance of verification and challenges
Brief introduction on rest of the chapters
Reference designs
The main purpose of this book is to present the whole process of functional verification of an ASIC for successful tape out? with examples from first pass working silicon of multi million gate designs. The idea is to present a successful methodology so that a trend can be set to move towards a uniform verification methodology where everyone can share various verification components with each other. This book is a guide for verification engineers to help improve the methodologies for efficient and effective functional verification processes.
It is meant for everyone in industry involved with functional verification of ASICs. Also? it is useful for students for understanding what are the tools/processes to complete functional verification of ASICs.
Design/verification engineers who are work ing on ASIC or SOC verification
can use this book for self study. It can also be used as reference book in verification courses and any related topics.
students or beginners who want to enhance their knowledge about how to actually
verify a chip. Beginners can get insight of what is expected. For verification experts it will be a guide to help improving their methodologies for efficient and effective functional verification processes. Topics covered in this chapter are:
Purpose of the book
General info on importance of verification and challenges
Brief introduction on rest of the chapters
Reference designs
The main purpose of this book is to present the whole process of functional verification of an ASIC for successful tape out? with examples from first pass working silicon of multi million gate designs. The idea is to present a successful methodology so that a trend can be set to move towards a uniform verification methodology where everyone can share various verification components with each other. This book is a guide for verification engineers to help improve the methodologies for efficient and effective functional verification processes.
It is meant for everyone in industry involved with functional verification of ASICs. Also? it is useful for students for understanding what are the tools/processes to complete functional verification of ASICs.
Design/verification engineers who are work ing on ASIC or SOC verification
can use this book for self study. It can also be used as reference book in verification courses and any related topics.
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