On Semi公司的RSL10是藍牙5規(guī)范多協(xié)議無線片上系統(tǒng)(S0C),具有雙核架構(gòu)和2.4GHz收發(fā)器,提供業(yè)界最低功耗,支持藍壓低功率和2.4GHz專用或定制協(xié)議,可使超低功耗藍牙應用到無線應用如心率監(jiān)視儀具有先進的無線特性而有最佳的系統(tǒng)尺寸和電池壽命.RSL10采用1.2V和1.5V電池,發(fā)送功率-17到+6dBm,RX接手靈敏度-94dBm,數(shù)據(jù)速率52.5-2000kbps,主要用在IoT前節(jié)點應用,藍牙低功耗技術(shù),可穿戴,能量收獲,血糖儀(BGM).本文介紹了RSL10主要特性,框圖和架構(gòu)圖及其主要單元,應用電路,以及開發(fā)板與評估板和開發(fā)板主要特性,電路圖,材料清單和PCB設計圖.

RSL10 is a Bluetooth 5 certified, multi-protocol radio System on Chip (SoC) which brings ultra-low-power Bluetooth Low Energy towireless applications.

Offering the industry’s lowest power consumption, RSL10 helps provide devices like heart rate monitors with advanced wirelessfeatures while optimizing system size and battery life.

Unlike most other multi-protocol radio SoCs, RSL10 is specifically designed for applications using 1.2 and 1.5 V batteries, andsupports a voltage supply range between 1.1 and 3.3 V without a required DC/DC converter. The highly-integrated radio SoCfeatures a dual-core architecture and a 2.4 GHz transceiver, providing the flexibility to support Bluetooth Low Energy and 2.4 GHzproprietary or custom protocols.



RSL10主要特性:
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圖1.RSL10框圖

圖2.RSL10架構(gòu)圖

RSL10架構(gòu)圖中主要單元:
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RSL10應用

? IoT Edge-Node Applications
? Bluetooth Low Energy Technology
? Wearables
? Energy Harvesting
? Blood Glucose Monitors (BGM)

RSL10終端產(chǎn)品:

? Fitness Trackers/Activity Monitors
? Smart Watches
? Hearing Aids/Hearables
? Heart Rate Monitors

圖3.RSL10降壓模式應用框圖

圖4.RSL10 LDO模式應用框圖

RSL10開發(fā)板

The RSL10 development board is used to easily develop Bluetooth? low energy technology-enabled applications based on the industry’s lowest power radio System-on-Chip (SoC).

RSL10開發(fā)板主要特性:

Compliance with the Arduino form factor
Support for PMOD (e.g., J4 is a standard connector)
On-board J-Link feature for simple debugging
Alternate on-board SWJ-DP (serial-wire and/or JTAG) for ARM? Cortex? -M3 processor debugging
Access to all RSL10 peripherals via standard 0.1" headers
On-board 4-bit level translator to translate the LPDSP32 debug interface at a low voltage to a 3.3 V JTAG debugger
Antenna matching and filtering network
Integrated PCB antenna
Bluetooth_ Low Energy IoT Development Kit (B-IDK)
This document helps you get started with the Bluetooth Low Energy IoT Development Kit (B?IDK). The B?IDK is acomprehensive node?to?cloud and a modular IoT platform that allows development of various BLE based use cases. Alongwith the hardware and software, the B?IDK includes a mobile app to interact with sensors and actuators.
The B?IDK features RSL10, Industry’s lowest power Bluetooth 5 SoC and comprises of a baseboard (BDK?GEVK) andseveral sensor and actuator daughter cards. For a complete listing of available daughter cards, please visithttps://www.onsemi.com/B?IDK. The daughter cards connect to the baseboard, via the two PMOD connectors and/or theArduino connector to enable various use cases.
HARDWARE
? BDK?GEVK ? B?IDK Baseboard
? Daughter Cards – Optional
? BDK?DCDC?GEVB – Power Shield For Use With Higher Power
Daughter Cards – Optional

圖5.RSL10開發(fā)板外形圖

圖6.RSL10開發(fā)板電路圖(1)

圖7.RSL10開發(fā)板電路圖(2)

圖8.RSL10開發(fā)板電路圖(3)

圖9.RSL10開發(fā)板電路圖(4)

圖10.RSL10開發(fā)板電路圖(5)

圖11.RSL10開發(fā)板電路圖(6)

圖12.RSL10開發(fā)板電路圖(7)

圖13.RSL10開發(fā)板電路圖(8)
RSL10開發(fā)板材料清單:

RSL10評估板和開發(fā)板

The RSL10 Evaluation and Development Board is usedfor evaluating the RSL10 SoCand for applicationdevelopment. The board provides access to all input andoutput connections via 0.1″ standard headers. The on-boardcommunication interface circuit provides communication tothe board from a host PC. The communication interface

translates RSL10 SWJ?DP debug port signals to the USB ofthe host PC. There is also an on-board 4-bit level shifter fordebugging; it translates the I/O signal level of RSL10 to the 3.3 V digital logic level.

The Evaluation and Development Board enablesdevelopers to evaluate the performance and capabilities ofthe RSL10 radio SoC in addition to developing,demonstrating and debugging applications.

RSL10評估板和開發(fā)板主要特性:

? J?Link onboard solution provides a SWJ?DP(serial-wire and/or JTAG) interface that enables you todebug the board via a USB connection with the PC
? Alternate onboard SWJ?DP (serial-wire and/or JTAG)interface for ArmR CortexR?M3 processor debugging
? Access to all RSL10 peripherals via standard 0.1″headers
? Onboard 4-bit level translator to translate the LPDSP32debug interface at low voltage to a 3.3 V JTAGdebugger
? Antenna matching and filtering network
? Integrated PCB antenna
? Compliance with the Arduino form factor
? Support for PMOD (i.e., J4 is a standard connector)

圖14.RSL10評估板和開發(fā)板建立圖

圖15.RSL10評估板和開發(fā)板采用外接J-Link調(diào)試器建立圖

圖16.RSL10評估板和開發(fā)板電路位置圖(頂視)

圖17.RSL10評估板和開發(fā)板電路位置圖(底視)

圖18.RSL10評估板和開發(fā)板3D電路位置圖(頂視)

圖19RSL10評估板和開發(fā)板3D電路位置圖(底視)

圖20.RSL10評估板和開發(fā)板3D電路圖(1)

圖21.RSL10評估板和開發(fā)板3D電路圖(2)

圖22.RSL10評估板和開發(fā)板3D電路圖(3)

圖23.RSL10評估板和開發(fā)板3D電路圖(4)
RSL10評估板和開發(fā)板材料清單: